Through a semiconductor integrated circuit manufacturing process, an integrated circuit is formed on a processing target substrate such as a semiconductor wafer (hereafter may be simply referred to as a “wafer”) normally by repeatedly executing various types of processing such as film formation, etching and heat treatment. In addition, the wafer having undergone the various types of processing may further undergo a specific type of post-processing. Such post-processing may be, for instance, wafer cleaning processing (e.g., processing executed to remove matter having settled on the wafer) or processing executed to determine through measurement the processing results (e.g., film thickness measurement processing or particle measurement processing).
The wafer processing described above may be executed in, for instance, a substrate processing apparatus that includes a processing chamber where specific types of processing such as plasma processing and measurement processing can be executed. The substrate processing apparatus may include a transfer robot with a transfer arm that carries the wafer into the processing chamber by rotating and moving forward/backward. The wafer is usually transferred from the transfer arm onto a stage installed in the processing chamber.
There is a method known in the related art that is adopted when transferring the wafer as described above, whereby a plurality of support pins passing through the stage are made to move up/down so as to receive the wafer from the transfer arm onto the support pins and then set the wafer onto the stage (see, for instance, patent reference literature 1). In another transfer method, the wafer, held by tweezers constituting part of the transfer robot, is transferred onto the stage by a rotary arm disposed between the transfer robot and the stage (see patent reference literature 2).
In order to ensure that the wafer placed on the stage is processed in an optimal manner, the wafer must be accurately positioned on the stage by not allowing any positional misalignment of the wafer along the horizontal direction. Accordingly, if the wafer is misaligned along the horizontal direction, the wafer is taken off the stage by the transfer arm, the misalignment is corrected at the transfer arm or the transfer robot and then the wafer is replaced onto the stage in the related art.
More specifically, if the wafer, having been transferred by moving up/down the support pins as disclosed in patent reference literature 1 is determined to be misaligned, the wafer on the stage is lifted up with the support pins and the transfer arm waiting in place, retrieves the wafer. The wafer position is then adjusted by manipulating the transfer arm before the wafer is set back on the stage.
If the transfer robot itself includes a wafer alignment device as disclosed in patent reference literature 2, the wafer position is corrected on the tweezers of the transfer robot and then the wafer is carried back onto the stage by the rotary arm (see FIGS. 2 and 3 in patent reference literature 2).
The transfer arm or the transfer robot engaged in the misalignment correction as described above cannot perform another operation (e.g., the transfer arm or the transfer robot cannot be engaged in the transfer of another wafer). This gives rise to a problem in that the throughput of the wafer processing becomes poorer.
This concern is addressed in the method proposed in the related art, whereby the stage is displaced along the X-direction and the Y-direction in order to correct misalignment of the wafer manifesting along the horizontal direction without engaging the transfer arm. For instance, patent reference literature 3 discloses a method whereby the stage with the wafer placed thereupon is rotated and wafer misalignment is detected by detecting the entire outer circumferential edge of the wafer with a CCD linear sensor and then the detected misalignment is corrected by displacing the stage along the XY directions.
In addition, patent reference literature 4 discloses a method whereby the outer edge of the wafer is photographed with a plurality of CCD cameras while supporting the wafer with a rotary support member (carrier arm) suspended inside the processing chamber, the wafer position is detected based upon the photographing results and any misalignment of the wafer is corrected by displacing the stage along the X and Y directions.
However, in the method disclosed in patent reference literature 3, the wafer must be lowered onto the stage via a wafer lift to detect wafer misalignment and if any wafer misalignment is detected, the wafer needs to be lifted off the stage via the wafer lift and the stage has to be displaced along the X and Y directions to correct the misalignment and then the wafer needs to be lowered onto the stage again. Since the wafer needs to be lifted up and lowered multiple times, the misalignment correction is bound to be a time-consuming operation, which, in turn, is bound to lower the throughput of the wafer processing.
One of the issues yet to be addressed with regard to the art disclosed in patent reference literature 4 is that if the wafer is misaligned to such an extent that the CCD cameras cannot detect the outer edge of the wafer, wafer misalignment detection is disabled and thus, the misalignment cannot be corrected by driving the stage along the X and Y directions. In addition, since the rotary support member (carrier arm) which supports the wafer does not move along the X direction and the Y direction, the positional correction along the X and Y directions cannot be achieved via the rotary support member (carrier arm) itself.
Accordingly, the wafer must be retrieved by the transfer robot or the transfer arm and then be set back onto the rotary support member (carrier arm). Since the transfer arm or the transfer robot cannot be engaged in another operation (e.g., the transfer of another wafer) during this process as explained earlier, the throughput of the wafer processing is bound to become lower.    (patent reference literature 1) Japanese Laid Open Patent Publication No. H06-097269    (patent reference literature 2) Japanese Laid Open Patent Publication No. H05-343500    (patent reference literature 3) Japanese Laid Open Patent Publication No. H08-008328    (patent reference literature 4) Japanese Laid Open Patent Publication No. 2002-280287